1. Field of the Invention
The present invention relates to a home video camera equipped with a monitor screen and in particular to a monitor screen-integrated video camera which has a joint portion allowing a camera portion to rotate relative to a monitor portion so that the camera lens can be oriented in both the same and opposite directions with the face of the monitor screen.
2. Description of the Prior Art
Home video cameras are also called as a camera-integrated video tape-recorder, and this type of products, that is, including a VTR portion for allowing a video cassette tape to record pictures as well as a camera for taking pictures, have now been becoming popular in the market.
Now, a typical conventional monitor screen-integrated video camera will be explained with reference to drawings.
FIG.1 is an overall block diagram showing a prior art example of a monitor screen-integrated video camera.
In FIG.1, the conventional video camera has a camera portion 1 for picking up a picture of objects, a monitor portion 2 for displaying the picture of the objects that have been taken, and a joint portion 3 for jointing camera portion 1 and monitor portion 2 and allowing relative rotation of one to another.
Camera portion 1 includes a camera lens 4 and a picture pickup circuit 5 which converts optical images of objects formed by camera lens 4 into video picture signals to be outputted to monitor portion 2.
Monitor portion 2 includes: a monitor screen 6 such as of a liquid crystal panel or the like for displaying the picture of objects taken; a display driver circuit 7 for driving monitor screen 6; a VTR portion 8 for recording video picture signals on an unillustrated video cassette tape and reproducing video picture signals from a video cassette tape; a superimposition controlling circuit 209 for superimposing a date, operation information, caution notice and the like over the video pictures to be displayed on monitor screen 6 and/or to be recorded on the video cassette tape; and a microcomputer 210 for controlling the entire video camera.
Joint portion 3 has a rotational angle detecting switch 11 that detects a relative rotational angle of camera portion 1 to monitor portion 2. The rotational angle detecting switch 11 outputs to microcomputer 210 a self-image picture-taking mode signal that indicates that the camera is set in a position for picking up self-image when both camera lens 4 and monitor screen 6 are oriented to the same object.
Microcomputer 210 may instruct display driver circuit 7 to display a horizontally inverted, mirror-image of the pickup picture with reference to the self-image picture-taking mode signal.
Next, FIG.2 is an overall block diagram showing a superimposition controlling circuit 209 as a part of monitor portion 2.
Superimpose controlling circuit 209 comprises a command register 101, a data register 102, a command decoder 303, a text memory 110, a row-counter 111, a column-counter 112, a row-address selector 113, a column-address selector 114, a character code register 120, a character generator ROM 121, a ROM address counter 322, a left-shift register 123, AND-gates 126, 127, video picture signal adding circuits 128, 129, a clock oscillator (OSC) 130, a 1/m-divider 131 and a 1/n-divider 132.
Next, each component of the superimposition controlling circuit will be now described in further detail.
Command register 101 and data register 102 are each composed of a series input/parallel output shift register and receive command and display character data associated with the command, respectively, both of which are serially transmitted from microcomputer 210, and output parallel command and data, respectively.
Command decoder 303 decodes the command accepted by command register 101 and generates a control timing signal.
Text memory 110 consists of memory sections arranged in a 12-row.times.24-column matrix form for filling one full-frame region of the screen. Each of the memory sections can store a character code for one character and information associated with the character. Information to be written in text memory 110 is display character data consisting of character codes and associated information with characters held in data resistor 102, and is written in memory sections designated by corresponding commands.
An address in text memory 110 is designated by a two-way selector, that is, consisting of a row-address selector 113 and a column-address selector 114. Upon writing data into text memory 110, selectors 113 and 114 are designated by a writing address associated with the data to be written in and stored in the command register, to thereby form a text memory address. When data in text memory 110 is to be read out, an address in the text memory is generated by selecting row and column addresses with the help of a row-counter 111 and a column-counter 112 that count cyclically.
Column-counter 112 for providing a column-address (or a horizontal-direction address) in text memory 110 is reset by a horizontal synchronizing signal (HSYNC) and counts signals .phi..sub.1 that are formed by dividing an output signal .phi..sub.0 from clock oscillator (OCS) 130 by means of 1/n-divider circuit 132. Here, a period of .phi..sub.0 is a time corresponding to a horizontal length of one pixel in forming character patterns that are read out from the character generator ROM and `n` is a number in the horizontal direction of the pixels constituting one character.
Row-counter 111 for providing a row-address (or a vertical-direction address) in text memory 110 is reset by a vertical synchronizing signal (VSYNC) and counts signals that are formed by dividing the horizontal synchronizing signal (HSYNC) by means of 1/m-divider circuit 131. Here, `m` is a number in the vertical direction of the pixels constituting one character.
Character code register 120 stores the character codes and associated modifying information therewith which are read out from text memory 110.
Character generator ROM 121 converts a character code into a display pattern of m dots.times.n dots. A readout address in character generator ROM 121 consists of an upper bit portion indicating a character code in character code register 120 and a lower bit portion which is provided from ROM address counter 322.
ROM address counter 322 counts horizontal synchronizing signals to provide a lower bit portion for the readout address in character generator ROM 121 and the thus formed addresses are successively used for reading out one character pattern in the vertical direction.
Left-shift register 123 is a readout register for character generator ROM 121. After read-out data sets have been set in parallel in the left-shift register 123, the data sets are shifted based on clock signal .phi..sub.0 to be converted into serial data.
Character pattern data delivered serially from left-shift register 123 is supplied to both AND-gates 126 and 127 on their one input side. Output indicating bits 120-2, 120-3 for the modifying information in character code register 120 are connected to respective other input terminals of AND-gates 126 and 127. In accordance with ON/OFF state in output indicating bits 120-2 and 120-3, the output from AND-gate 126 and/or 127 is allowed or inhibited so as to control character pattern data to be added or not in the video picture signal adding circuits in the next stage.
Video signal adding circuits 128 and 129 add character pattern data delivered from respective AND-gates 126 and 127 to the video picture signal supplied from picture pickup circuit 5 so as to superimpose character patterns on the video picture signal. The video picture signals overlaid with character patterns in video picture signal adding circuits 128 and 129 are sent out to VTR portion 8 and monitor screen driver circuit 7, respectively.
Next, the operation of the thus constructed superimposition controlling circuit will be described.
Microcomputer 210 for controlling the entire video camera performs edit-control of the text to be superimposed on both the video picture signal displayed on monitor screen 6 and the video picture signal recorded on the video tape (not shown).
Composition of the text is effected on text memory 110 of 12-row.times.24 column matrix. That is, microcomputer 210 designates positions of memory sections on text memory 110 so as to write characters one by one onto the text memory.
An instruction of writing onto text memory 110 is effected by a control command containing a four-bit row address and a five-bit column address and the data associated with the control command. The control command and the associated data therewith are serially transmitted from microcomputer 210 to superimposition controlling circuit 209 and accepted therein by a pair of shift-registers combined, namely command register 101 and data register 102.
Command decoder 303 decodes the command accepted by command register 101 and if the command indicates the data to be written in, the row and column designated by the command is selected by row-address selector 113 and column-address selector 114 so that a writing pulse is generated for text memory 110.
When the writing pulse is launched from command decoder 303, the data held in data register 102 is written onto text memory 110.
The data to be written onto text memory 110 comprises a character code and modifying information associated therewith. The character code may be constructed of one-byte or two-byte character code system selected depending upon the text content to be displayed. Examples of one-byte character code for representing alphanumeric include ISO code and ANSI code, etc. On the other hand, inclusion of Japanese characters such as `kana` and `kanji` (Japanese phonogram and Chinese characters, respectively) requires a two-byte character code containing the JIS first-level kanji and the JIS one-byte code.
Associated information with character code is composed of one bit allotted for designating the monitor screen as an output means, another bit allotted for designating the VTR portion as another output means, a field for designating a color to be displayed. The two bits for designating output means enable the monitor screen and/or the VTR portion to be designated independently of one another.
Character information to be outputted to the VTR portion is typically a date indication while character information to be outputted on the monitor screen includes: in addition to the date indication, operation indication which is displayed for a period of time in accordance with the operation of a video camera switch as the switch is operated; and cautions relating to the operation State of the video camera such as a remaining amount of tape and a remaining amount of battery power, etc.
Next, FIG.3 is a diagram showing an example Of texts to be stored in the aforementioned text memory 110.
Text memory 110 is a readable and writable memory for storing display data for one full-frame of the screen consisting of, as shown in FIG.3, in total, 288 (12 rows.times.24 columns) character sections for display character data.
Each display character data consists of, as described above, a character code and associated information with character. The associated information with character includes a field for designating a display color, which consists of three bits and indicates red by [100], green by [010], blue by [001] and white by [111]. This color information is outputted commonly to the two output means.
Detail of controlling the character display color is not the subject matter of the present invention and is considered to be unnecessary so that no further description will be made.
In accordance with the character display example shown in FIG.3, display character data stored at an address (row `0`, column `0`) in text memory 110 indicates that the character is "1", the output means is "monitor screen and VTR portion", and the display color is "white". Display character data held at another address (row `8`, column `1`) designates that the character is "B", the output means is "monitor screen", and the display color is "red". Display character data held at still another address (row `10`, column `18`) designates that the character is "F", the output means is "monitor screen", and the display color is "green".
Here, addresses with no display character data held are stored with blank data.
The procedure of address counting in text memory 110 is performed such that the column address is successively increased one by one from column `0` to column `23` in synchronization with the scanning of the video picture signal in horizontal direction. Then, every time the horizontal synchronization signals are counted `m` times, the row address is successively increased one by one, counting up from row `0` to row `11` within a span of one field.
Next, FIGS.4 to 6 show relations between positions of a prior art video camera and display states of its monitor screen in the normal picture taking use and in the self-image taking use.
FIG.4 shows a manner in which a video image of an object A is displayed on monitor screen 6 when the normal picture taking operation is effected.
The video camera shown in FIG.4 is composed of a camera portion 1 accommodating a camera lens 4 and a picture pickup circuit 5; a monitor portion 2 accommodating a liquid crystal display monitor screen 6, a VTR portion 8 and operation switches 18; and a joint portion 3 which allows camera portion 1 to rotate relative to monitor portion 2.
Here, it will be assumed that displayed simultaneously on monitor screen 6 shown in FIG.4 are a date indication (e.g., 1993.4.1) 19 to be recorded on a video tape, a caution indication (e.g., BATTERY) 20 which indicates the battery power of the video camera runs short and an operation indication (e.g., FOCUS) 21 which indicates an operation type of operation switches 18.
At the time of the normal picture-taking operation, monitor screen 6 is scanned from the upper left to the lower right, or in the same direction as is done on a typical TV screen.
FIG.5 is a self-image picture-taking state of the video camera in which both camera lens 4 and monitor screen 6 are oriented toward an identical objects B. For effecting the self-image taking, with camera portion 1 fixed, monitor portion 2 is rotated upside down or 180 degrees on joint portion 3 so that monitor screen 6 may be oriented in the same direction with the picture-taking direction of camera lens 4 (hereinafter, this state is called self-image picture-taking state I).
In the self-image picture-taking state I, monitor screen 6 is scanned with the scanning direction turned right-side left in opposition to the case of the normal picture taking, from the upper right to the lower left. As a result, the picture of an object B is displayed on monitor screen 6, right-side left or as a horizontally inverted mirror-image.
FIG.6 shows another self-image picture-taking state. For effecting the self-image taking, with monitor portion 2 fixed, camera portion 1 is rotated upside down or 180 degrees on joint portion 3 so that monitor screen 6 may be oriented in the same direction with the picture-taking direction of camera lens 4 (hereinafter, this state is called self-image taking state II).
In the self-image picture-taking state II, monitor screen 6 is scanned with the scanning direction turned upside down in opposition to the case of the normal picture taking, from the lower left to the upper right. As a result, the picture of an object C is displayed on monitor screen 6, right-side left or as a horizontally inverted mirror-image.
However, in the above prior art self-image picture-taking states, since the scanning direction of the monitor screen is turned right-side left or up-side down to display the mirror-image picture, if display characters are tried to be displayed on the monitor screen as is performed in the normal picture taking state, characters turned right-side left or up-side down are displayed on the monitor screen. Therefore, the text superimposition on the monitor screen in the self-image picture-taking states was inhibited. Accordingly, the prior art apparatus suffered from a problem that the date and/or time to be recorded on the video tape could not be confirmed on the monitor screen.
In addition, in the self-image picture-taking state I, since monitor portion 2 is turned down-side up as compared to the normal taking state, the operation switches are positioned on the top of the monitor screen, if the operation indication is tried to be displayed on the monitor screen as is performed in the normal picture taking state, the indication on the monitor screen is displayed away from the position of the operation switches and the display character is turned right-side left on the monitor screen. Therefore, the operation indication on the monitor screen in the self-image picture-taking state was inhibited. Accordingly, the prior art apparatus suffered from inconvenience that the operation of the video camera could not be confirmed on the monitor screen.